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Machine CRC

Responsibilities:

class Machine {
  public:
    Machine(bool debug);        // Initialize the simulation of the hardware
                                // for running user programs
    ~Machine();                 // De-allocate the data structures

// Routines callable by the Nachos kernel
    void Run();                 // Run a user program

    int ReadRegister(int num);  // read the contents of a CPU register

    void WriteRegister(int num, int value);
                                // store a value into a CPU register


// Routines internal to the machine simulation -- DO NOT call these

    void OneInstruction(Instruction *instr);
                                // Run one instruction of a user program.
    void DelayedLoad(int nextReg, int nextVal);
                                // Do a pending delayed load (modifying a reg)

    bool ReadMem(int addr, int size, int* value);
    bool WriteMem(int addr, int size, int value);
                                // Read or write 1, 2, or 4 bytes of virtual
                                // memory (at addr).  Return FALSE if a
                                // correct translation couldn't be found.

    ExceptionType Translate(int virtAddr, int* physAddr, int size,bool writing);
                                // Translate an address, and check for
                                // alignment.  Set the use and dirty bits in
                                // the translation entry appropriately,
                                // and return an exception code if the
                                // translation couldn't be completed.

    void RaiseException(ExceptionType which, int badVAddr);
                                // Trap to the Nachos kernel, because of a
                                // system call or other exception.

    void Debugger();            // invoke the user program debugger
    void DumpState();           // print the user CPU and memory state


// Data structures -- all of these are accessible to Nachos kernel code.
// "public" for convenience.
//
// Note that *all* communication between the user program and the kernel
// are in terms of these data structures.

    char *mainMemory;           // physical memory to store user program,
                                                     // code and data, while executing
    int registers[NumTotalRegs]; // CPU registers, for executing user programs


// NOTE: the hardware translation of virtual addresses in the user program
// to physical addresses (relative to the beginning of "mainMemory")
// can be controlled by one of:
//      a traditional linear page table
//      a software-loaded translation lookaside buffer (tlb) -- a cache of
//        mappings of virtual page #'s to physical page #'s
//
// If "tlb" is NULL, the linear page table is used
// If "tlb" is non-NULL, the Nachos kernel is responsible for managing
//      the contents of the TLB.  But the kernel can use any data structure
//      it wants (eg, segmented paging) for handling TLB cache misses.
//
// For simplicity, both the page table pointer and the TLB pointer are
// public.  However, while there can be multiple page tables (one per address
// space, stored in memory), there is only one TLB (implemented in hardware).
// Thus the TLB pointer should be considered as *read-only*, although
// the contents of the TLB are free to be modified by the kernel software.

    TranslationEntry *tlb;              // this pointer should be considered
                                        // "read-only" to Nachos kernel code

    TranslationEntry *pageTable;
    unsigned int pageTableSize;

  private:
    bool singleStep;            // drop back into the debugger after each
                                // simulated instruction
    int runUntilTime;           // drop back into the debugger when simulated
                                // time reaches this value
};